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ENSIGMA COMMUNICATIONS IP CORES


With the number of conflicting broadcast standards used worldwide still rapidly growing it is highly desirable for device manufacturers to increase flexibility and future-proofing while minimizing risk by using a multi-standard solution.

Imagination Technologies' ENSIGMA™ UCCP IP platforms are a unique range of low-power solutions enabling multiple analogue and digital TV, mobile TV, and digital and analogue radio reception standards on a single device whilst delivering exceptionally low power dissipation.

They provide a uniquely optimized balance of programmability and hardware configurability, yet occupy equivalent or less silicon area than hard-wired, single-standard demodulation solutions in the market.
The Universal Communications Core (UCC) is at the heart of all of our ENSIGMA communications products. This unique architecture is made up of three key engines:

SCP (Signal Conditioning Processor)

Configurable hardware that enables a wide range of low IF and zero IF tuners to be connected to UCC. SCP samples the IF signal, retimes it and performs front-end filtering and other sENSIGMA UCC Block Diagramignal conditioning to deliver consistent, high-precision IF data samples to the demodulation processor. It is the SCP that makes the UCC very easy to integrate with a wide range of RF solutions.

MCP (Modulation Control Processor)

The MCP delivers the unrivalled flexibility of the UCC. An advanced vector processor with multiple parallel execution units, the MCP is fully programmable using low-level microcode, to enable demodulation of almost any analogue or digital modulation standard, from FM or DAB/DAB+ radio, through to Nordig compliant DVB-T, DVB-H, or ISDB-T 1/3/fullseg. All with the same silicon engine, and using silicon area that rivals any other leading single-standard solution available.

ECP (Error Correction Processor)

The ECP completes the engine by providing high-performance hardware viterbi, Reed Solomon and other coding technologies. By performing these functions in reconfigurable hardware, exceptionally low levels of power consumption can be achieved whilst utilizing the highest levels of coding.